	org 0x0
start:
	; MOV A,#data
	; MOV Rn, A 
	MOV A, #0x00
	MOV R0, A
	MOV A, #0x11
	MOV R1, A
	MOV A, #0x22	
	MOV R2, A
	MOV A, #0x33
	MOV R3, A
	MOV A, #0x44
	MOV R4, A
	MOV A, #0x55
	MOV R5, A
	MOV A, #0x66
	MOV R6, A
	MOV A, #0x77
	MOV R7, A
	
	; MOV direct,Rn
	MOV 0x30, R0
	MOV 0x31, R1
	MOV 0x32, R2
	MOV 0x33, R3
	MOV 0x34, R4
	MOV 0x35, R5
	MOV 0x36, R6
	MOV 0x37, R7
	
	sjmp $
	
; for test
REG_SP		EQU	0x1000
REG_A		EQU	0x1001
REG_B		EQU	0x1002
REG_PSW		EQU	0x1003
REG_PC		EQU	0x1004
REG_DPTR	EQU	0x1005
CYCLE		EQU 0x1006
REG_R0		EQU	0x2000
REG_R1		EQU	0x2001
REG_R2		EQU	0x2002
REG_R3		EQU	0x2003
REG_R4		EQU	0x2004
REG_R5		EQU	0x2005
REG_R6		EQU	0x2006
REG_R7		EQU	0x2007
REG_END		EQU	0x2FFF
	org 0x600
	dW  0x30,		0x00
	dW  0x31,		0x11
	dW  0x32,		0x22
	dW  0x33,		0x33
	dW  0x34,		0x44
	dW  0x35,		0x55
	dW  0x36,		0x66
	dW  0x37,		0x77

	dW  REG_SP,		0x7
	dW  REG_A,		0x77
	dW  REG_B,		0x0
	dW  REG_PC,		0x28
	dw  REG_DPTR,	0x0
	dw 	CYCLE,		34
	dW  REG_R0,		0x00
	dW  REG_R1,		0x11
	dW  REG_R2,		0x22
	dW  REG_R3,		0x33
	dW  REG_R4,		0x44
	dW  REG_R5,		0x55
	dW  REG_R6,		0x66
	dW  REG_R7,		0x77

	dw  REG_END,	0
	end		